1. Field of the Invention
The disclosed embodiments relate to modeling the resistance of a diffusion region of a semiconductor device and, more particularly, to a method, a system and a program storage device for modeling the resistance of a multi-contacted diffusion region of a semiconductor device, such as a metal oxide semiconductor field effect transistor (MOSFET), a metal oxide semiconductor capacitor (MOS capacitor) or a bipolar transistor.
2. Description of the Related Art
Diffusion region resistance is one of the largest parasitic resistances that impact the performance of semiconductor devices, such as metal oxide semiconductor field effect transistors (MOSFETs), metal oxide semiconductor capacitors (MOS capacitors), bipolar transistors, etc. Thus, during semiconductor device design, accurate modeling of diffusion region resistance is very important. However, the current techniques used to model the resistance of a multi-contacted diffusion region (i.e., a diffusion region that is contacted by multiple contacts) may result in a relatively large error. Therefore, there is a need in the art for technique that can be used to more accurately model the resistance of a multi-contacted diffusion region.